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\pard\plain \ltrch\loch {\f0\fs22\b0\i0 Most of the hardware description languages (HDLs) used to design logic for FPGAs and chips also contain aspects of temporal programming - in particular the non-blocking assignment operator in Verilog \loch\af0\hich\af0\dbch\af0\uc1\u8220\'93x <= y\u8221\'94 is equivalent to \u8220\'93x@ = y\u8221\'94.}
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